From 1bedb0fcc70b860098ac847846ca4210d48364af Mon Sep 17 00:00:00 2001 From: Greg Thompson Date: Wed, 13 May 2026 14:18:06 +0200 Subject: [PATCH 2/6] Fix undefined behavior in CpuArch.h flagged by UBSan caused by invalid pointer casts --- third_party/lzma_sdk/src/C/CpuArch.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/third_party/lzma_sdk/src/C/CpuArch.h b/third_party/lzma_sdk/src/C/CpuArch.h index c682720874b98..e4560ae3fc22c 100644 --- a/third_party/lzma_sdk/src/C/CpuArch.h +++ b/third_party/lzma_sdk/src/C/CpuArch.h @@ -421,14 +421,18 @@ MY_CPU_64BIT means that processor can work with 64-bit registers. #endif - +// Disable MY_CPU_LE_UNALIGN. Although the underlying ISA may be able to load +// unaligned words, doing so via pointer casts is undefined behavior in C and +// C++, under both strict aliasing and because it is invalid to construct +// unaligned pointers. Instead, load the bytes generically and leave optimizing +// this to the compiler. #ifdef MY_CPU_LE #if defined(MY_CPU_X86_OR_AMD64) \ || defined(MY_CPU_ARM64) \ || defined(MY_CPU_RISCV) && defined(__riscv_misaligned_fast) \ || defined(MY_CPU_E2K) && defined(__iset__) && (__iset__ >= 6) - #define MY_CPU_LE_UNALIGN - #define MY_CPU_LE_UNALIGN_64 + // #define MY_CPU_LE_UNALIGN + // #define MY_CPU_LE_UNALIGN_64 #elif defined(__ARM_FEATURE_UNALIGNED) /* === ALIGNMENT on 32-bit arm and LDRD/STRD/LDM/STM instructions. Description of problems: -- 2.54.0.563.g4f69b47b94-goog